33L5040 IBM-IMSourcing

This 2GB DDR SDRAM Memory DIMM option allows the memory chip to perform transactions on both the rising and falling edges of the clock cycle. Thus, two data transfers can be performed during one clock period. This technique can help effectively double the memory transfer rate for PC133MHz memory bus rate and yield an effective data transfer rate of up to 266MHz. This increased transfer speed coupled with the expanded 2GB capacity enables a new generation of higher performance, lower cost xSeries servers that will be able to offer expanded communications and networking solutions.

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